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RTL and DV Engineer

Location TBDContract To HireSemiconductor

Section

About the Role

Location: Remote (U.S. only)

Headcount: 2 RTL and 1 DV openings

Contract: 1-year contract duration preferred on 2-year project with potential extension or full-time conversion; Start: October 1st preferred

Why Hiring

  • High priority project to support semiconductor companies with design and verification services

End Product

  • Semiconductor design blocks and verification services prior to customer tape-out

Tech / Domain Environment

  • Custom-built AI workflow tools and formal verification engines
  • PCIe, UVM environment for ARM wrapper, ML subsystem
  • Jasper Gold and internal formal verification tools

Job Duties

  • Work directly in production on customer-facing design blocks including RTL, DB jobs, and CPU subsystem integration
  • Work across 20 smaller blocks over two years using custom-built AI workflow tools
  • Focus on design ownership of smaller IPs rather than critical modules
  • Perform verification prior to customer tape-out with full individual ownership

Must Haves

  • Experience with PCIe and UVM environments for ARM wrappers
  • Experience with ML subsystems finding real bugs
  • Proven formal verification experience

Nice to Haves

  • Startup experience understanding startup life and demands

Security / Clearance

  • [Not captured]