Duration : 6+ months
Motivators for this need: This role has been opened due to work on digital IP intellectual property and acceleration, including functions like DMA (Direct Memory Access) and data compression, decompression, encryption, and decryption. This digital IP will be integrated into Microsoft's SoC chip used in Azure Data Centers.
Typical Day in the Role
Purpose of the Team: The purpose of this team is Validation Microsoft's Silicon.
Key projects: This role will contribute to Accelerator IP.
Typical task breakdown and operating rhythm: The role will consist of 85% Development, and 15% Meetings.
Compelling Story & Candidate Value Proposition
What makes this role interesting? - This role provides the opportunity to work on Delivering IP to Microsoft's Azure /AI siliconx.
Unique Selling Points: Developing IPs from Scratch.
Demonstrated validation experience in one or more of the following: Validation of:
- Functional: Core, PCIe, Memory Controller, IO, Power Management, Coherency, Manageability, BIOS/Microcode development and debug, or Fuses
- Electrical: Serdes, IO
- Power and Performance
- Expertise in Python, C, and C++
- Some knowledge of Verilog
- Attention to detail; analytical and problem-solving ability
Candidate Requirements
- 2-4 years of experience in silicon validation, testing, or debugging
- Degrees or certifications required: Bachelor’s degree in Electronics and Communication Engineering, Computer Engineering, or related degree is required to be eligible for this role.
- Disqualifiers: Candidates with switching companies often will not be eligible for the role.
- Best vs. Average: The ideal resume would contain C, C++, Python, Silicon Debugging skills, Post silicon Validation
- Performance Indicators: Performance will be assessed based on quality of work.
Top 3 Hard Skills Required + Years of Experience
1. Minimum 2-4 years in silicon Validation and Debug
2. Minimum 2-4 years experience with C, C++
3. Minimum 2-4 years experience with scripting (Python).
Hard Skills Assessments
- Expected Dates that Hard Skills Assessments will be scheduled: ASAP
- Hard Skills Assessment Process: The assessment process will include behavioral and technical assessment.
- Required Candidate Preparation: Candidates should have technical questions/past projects prepared prior to the assessment.
Summary:
The main function of Silicon Validation Engineer is to run, triage, and maintain silicon system regressions and report the results.
Job Responsibilities:
- Develop and execute validation test plans for various SoC features and subsystems in one of the following areas - functional, electrical, or power/performance.
- Perform functional, stress, and performance testing using hardware and software tools.
- Analyze test results and identify, isolate, and debug issues.
- Document and communicate test findings and status to stakeholders.
- Collaborate with design, verification, and software teams to provide feedback and suggestions for improvement.
- Support the development and enhancement of validation methodologies and tools. Run and maintain silicon system regressions
Skills:
- 2-4 years of experience in silicon validation, testing, or debugging.
- Demonstrated validation experience in one or more of the following: Validation of:
- Functional: Core, PCIe, Memory Controller, IO, Power Management, Coherency, Manageability, BIOS/Microcode development and debug, or Fuses
- Electrical: Serdes, IO
- Power and Performance
- Expertise in Python, C, and C++
- Some knowledge of Verilog
- Attention to detail; analytical and problem-solving ability
